1. Field of the Invention
The present invention relates generally to sending analog signals between a computer and an external device. More specifically, the present invention relates to sending precision analog signals between a computer and external device that has hostile electrical characteristics, including the presence of very large common mode voltages and normal mode overvoltages of up to 120 VAC/VDC.
2. Description of the Prior Art
The prior art for this field relates specifically to utilizing a flight simulation computer to send a precision analog signal to an actual aircraft located in a hangar. Such signals are necessary to enable certain testing to be performed on the aircraft General prior art for this invention relates to a precision analog transmission interface when the described hostile electrical conditions exist.
Under the present state of prior art, when computers are expected to deliver precision analog voltages to various external devices for excitation purposes, two problems are frequently encountered. The first is a significant difference in the ground potential between the desired computer and the specific external device This problem is compounded when the external device contains within itself significant ground potential differences from point to point, and the interconnects to be made involve various points on the external device.
For instance, these ground potential differences, or common mode voltages, often exceed the output range of the sending amplifiers, which usually are limited to +or - 10 volts. In some cases, the receiving amplifier is of the differential type, which can compensate for much of the common mode voltage, provided it is not too large. However, in other cases, the receiving amplifier is a single-ended type and cannot compensate for ground potential differences. If the common mode voltage is too high, even the differential amplifier cannot compensate for ground potential differences.
The second problem is that, as a result of either wiring errors or equipment failures, large voltage sources up to 120 VAC/VDC are occasionally applied to the signal leads. When this occurs, the sending amplifier and other related components are instantly destroyed, causing expensive downtime while repairs are made.
Prior art has developed an electronic output circuit that can withstand the application of large voltage sources without damage. This circuit, however, is directly coupled and is not capable of operation in a large common mode voltage environment. Thus the approach has been to force the ground potentials of the sending computer and the external device (e.g. aircraft) to be close to each other by connecting heavy ground cables.
That prior art attempt to force ground potentials together using heavy cables sometimes works and sometimes fails. This approach also causes large ground loop currents to flow, which sometimes leads to erratic computer operation. In general, solving this problem often requires a case-by-case trial-and-error solution, which varies from problem to problem. Much time is often consumed trying to get the system to work.
An additional limitation of prior technology is that when the external device (e.g. aircraft) has significant ground potential differences within itself, errors occur when analog voltages are sent to some other part of the device that does not have a direct ground connection. If the receiving circuits are of the differential type, and if the common mode voltages are not too large, signal quality is acceptable. However, if either the receiving circuits are single-ended or the common mode voltage is too high, signal quality degrades and can become completely unusable.
Other prior art includes U.S. Pat. No. 3,617,907, issued to R. Garzon on Nov. 2, 1971, which discloses phase shifted voltage clipping of a signal pulse.
U.S. Pat. No. 3,617,906 issued to R. Garzon on Nov. 2, 1971, discloses generating a signal pulse in relation to an asymmetric pulse reaching its zero value by phase shifting both the sinusoidal term and exponential term of a defining current.
U.S. Pat. No. 4,499,609 issued to W. Muska on Feb. 38, 1983, discloses a voltage comparator for quantizing the output to a logic level signal comprising symmetrical clamp means interposed between a post amplifier and the comparator.
U.S. Pat. No. 3,457,508 issued to Rowlands, et al. on July 22, 1969, discloses a digital pulse repeater system for reconstructing discrete binary signals.
U.S. Pat. No. 3,094,627 issued to J. Van Lottum on June 18, 1963, discloses a pulse transmission circuit having an output terminal and a parasitic capacitance between the output terminal and a constant potential, the circuit including means for eliminating adverse effects of the parasitic capacitance.
U.S. Pat. No. 4,071,780 issued to R. Burnett on Jan. 31, 1978, discloses a digital equipment tester utilizing digital circuitry for the control of any output transient voltages.
U.S. Pat. No. 3,573,641 issued to G. Zenk on Apr. 6, 1971, discloses a circuit for scanning celestial space wherein signal inputs provided by the sensor are compared to a signal indicative of the noise background envelope to eliminate the effects of noise.